The present invention relates to a resistive element and a method of manufacturing the same, and more particularly to a resistive element that can be applied to a high-precision analog circuit and a method of manufacturing the same.
As semiconductor devices are required to be more precise, high-precision semiconductor elements are required. For example, a semiconductor device in which a power supply circuit, a high-precision analog circuit, and the like are mounted includes multiple resistive elements. A technique for suppressing variation of resistance values of the resistive elements is required. A resistive element used in a semiconductor device is formed by patterning a polycrystalline silicon film formed over an insulating film into a shape of resistive element.
The resistive element is formed through a manufacturing process such as exposure and etching of the polycrystalline silicon film. Size variation generated when the polycrystalline silicon film is formed may be a factor of the variation of resistance values of the resistive elements formed through the manufacturing process. A technique for suppressing the variation of resistance values due to the size variation generated in the manufacturing process such as exposure and etching is known (for example, see Japanese Unexamined Patent Application Publication No. 2007-165622).
FIGS. 1A and 1B are diagrams showing a configuration of a resistive element 117 described in Japanese Unexamined Patent Application Publication No. 2007-165622. FIG. 1A is a plan view showing a plane surface of the resistive element 117, and FIG. 1B is a cross-sectional view showing a cross-section of the resistive element 117 taken along line A-A in FIG. 1A.
FIG. 1A indicates that the resistive element 117 described in Japanese Unexamined Patent Application Publication No. 2007-165622 includes a first resistor 113, an auxiliary resistor 114, a second resistor 115, an inter-resistor insulating film 123, a contact 131, and wiring 135. The inter-resistor insulating film 123 is formed between the first resistor 113 and the second resistor 115. The wiring 135 couples the first resistor 113 with the second resistor 115 in series. In the resistive element 117, one end portions of the first and the second resistors 113 and 115 facing each other are coupled to each other by the wiring 135 via the contacts 131, and the other end portions are coupled to other elements (not shown in FIG. 1A) in the semiconductor device by the wiring 133 via the contacts 131.
FIG. 1B indicates that the first resistor 113 and the auxiliary resistor 114 respectively have side surfaces extended over an insulating film 121 over a substrate 111. The inter-resistor insulating film 123 is formed over the upper surfaces and side surfaces of the first resistor 113 and the auxiliary resistor 114 and the upper surface of the insulating film 121. The side surfaces of the second resistor 115 respectively face an extended side surface of the first resistor 113 and an extended side surface of the auxiliary resistor 114 via the insulating film 2 between resistors. The upper surface of the second resistor 115 forms substantially the same surface as that of the inter-resistor insulating film 123 which is formed over the first resistor 113 and the auxiliary resistor 114. The second resistor 115 is formed so that a sum of the width of the second resistor 115 and the width of the adjacent first resistor 113 (or the auxiliary resistor 114) is constant.
FIGS. 2A, 2B, and 2C are cross-sectional views showing a manufacturing process of the resistive element 117 described in Japanese Unexamined Patent Application Publication No. 2007-165622. FIG. 2A indicates that, in the manufacturing process, a polysilicon film to be a first resistor 13 and an auxiliary resistor 14 is etched and removed and belt-shaped polysilicon films to be the first resistor 113 and the auxiliary resistor 114 are formed. Thereafter, the inter-resistor insulating film 123 is formed over the insulating film 121 and the first resistor 113 so that the inter-resistor insulating film 123 also covers the side surfaces of the first resistor 113.
FIG. 2B indicates that, in the manufacturing process, a polysilicon film 215, which is a second polysilicon film, is formed over the inter-resistor insulating film 123 by an LPCVD method or the like so that the thickness of the polysilicon film 215 is larger than or equal to a difference between the height of the inter-resistor insulating film 123 over the upper surface of the first resistor 113 and the inter-resistor insulating film 123 over the upper surface of the insulating film 121.
FIG. 2C indicates that, in the manufacturing process, the polysilicon film 215 is thinned from the surface thereof by a CMP (Chemical and Mechanical Polishing) method so that the upper surface of the polysilicon film 215 forms one surface with the upper surface of the inter-resistor insulating film 123 over the first resistor 113.
In the resistive element 117 described in Japanese Unexamined Patent Application Publication No. 2007-165622, the second resistor 115 is formed between the first resistor 113 and the auxiliary resistor 114, and the first resistor 113 is coupled with the second resistor 115, so that the effects of process variation are suppressed. For example, when the width of the first resistor 113 and the auxiliary resistor 114 is larger than the designed width, the resistance value changes to be low. At this time, the width of the second resistor 115 becomes narrow depending on the width of the first resistor 113 (or the auxiliary resistor 114) is constant. Therefore, the resistance value of the second resistor 115 changes to be high, so that the change of the total resistance value is suppressed by coupling the first resistor 113 with the second resistor 115.